Fakultät für Informatik
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Technische Universität München
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Integrated block-processing and design-space exploration in temporal paritioning for RTR architectures
Meenakshi Kaul
,
Ranga Vemuri
Lecture Notes in Computer Science
1586
, 1999, pp. 606-615
Interconnect synthesis for reconfigurable multi-FPGA architectures
Vinoo Srinivasan
,
Shankar Radhakrishnan
,
Ranga Vemuri
,
Jeff Walrath
Lecture Notes in Computer Science
1586
, 1999, pp. 588-596
An integrated partitioning and synthesis system for dynamically reconfigurable multi-FPGA architectures
Iyad Ouaiss
,
Sriram Govindarajan
,
Vinoo Srinivasan
,
Meenakshi Kaul
,
Ranga Vemuri
Lecture Notes in Computer Science
1388
, 1998, pp. 31-36
A performance modeling and analysis environment for reconfigurable computers
Jeffrey Walrath
,
Ranga Vemuri
Lecture Notes in Computer Science
1388
, 1998, pp. 19-24