Fakultät für Informatik
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Technische Universität München
Lehrstuhl für Effiziente Algorithmen
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Recovery in multicomputers with finite error detection latency
P. Krishna
,
N.H. Vaidya
,
D.K. Pradhan
Proceedings of the 1994 International Conference on Parallel Processing. Vol.~II Software (North Carolina State University, August 15-19, 1994)
, 1994, pp. 206-210
BDG-torus union graph - An efficient algorithmically specialized parallel interconnect
Neeraj Suri
,
Avi Mendelson
,
D.K. Pradhan
Proceedings of the 3rd IEEE Symposium on Parallel and Distributed Processing, SPDP'91 (Dallas, Texas, December 2-5, 1991)
, 1991, pp. 407-414
The De Bruijn multiprocessor network: A versatile parallel processing and sorting network for VLSI
M.R. Samatham
,
D.K. Pradhan
IEEE Transactions on Computers
38
(4), 1989, April, pp. 567-581
A framework for the study of permutations and applications to memory processor interconnection networks
D.K. Pradhan
,
K.L. Kodandapani
Proceedings of the 1979 ICPP
, 1979, August, pp. 148-158